Raghu Yerrapothu

About

PhD student at the Quantum Integrated Circuits Group of the Faculty of Engineering, Mathematics and Computer Science (EEMCS/EWI), Delft University of Technology.
Raghu received his M.Tech degree in VLSI System Design from NIT Warangal in 2014. Post his Masters, he worked at Intel as Analog Design Engineer part of Mixed Signal Design group focusing on delivering projects for SerDes solutions  >50GBpS data rates to enable communication networks for Hyper scale data centers and AI infrastructures. In the last 5 years he has worked extensively on clocking solutions for wireline applications with Jitter numbers targeting sub 100fS @Clock rates>16GHz.   He is currently working on Architecture for control and Readout electronics for SNSPD at cryo temperatures(~1-4K) as a part of QCAT group. His research interests include cryogenic electronics, Broadband communications, analog accelerators for AI.