Towards developing an effective yield prediction method for diamond based Quantum Photonic Integrated Circuits (QuPICs)
Photonic interconnections, devices and circuits are key to unlock the full potential of diamond based quantum technologies. However, implementing efficient quantum photonic integrated circuits (QuPICs) in/with diamond is challenging. To date, there is no foundry standard, diamond fabrication process chain. Although there are several approaches/processes being developed for fabricating high quality photonic structures, all the current approaches suffer significantly from fabrication errors and process variability. These degrade the yield/reliable production of identical devices and the targeted performance. Variability in the physical parameters of photonic components results into deviations from the desired optical properties. Such variations at component level propagate and accumulate at circuit level hampering circuits fabrication yield and only a fraction of the fabricated circuits works as designed. The fraction of reliable components further shrinks with increasing circuit size and complexity, which prevents realization of large scale quantum photonic circuit for diamond spin system. To improve the fabrication & performance yield, proper analysis and a practical method to predict & compensate process variations are essential.
In this project, we will research and construct necessary componentsto develop a realistic yield prediction method for the diamond based quantum photonics integrated circuits (QuPICs). Compact behavioral models for various photonic devices will be formulated and validated through simulation, optical measurements of on-chip components, which will help to map fabrication errors and allow performance evaluation. Statistics of fabrication errors will be analyzed and mapped to the on-chip photonic components and circuit performance variability.
An effective yield prediction method, based on stochastic analysis techniques, will efficiently include fabrication errors in the design phase and create new design rules for compensating the impact of process variations in the QuPICs fabrication process. The works carried out in this project will allow us to develop an effective yield prediction method.
[1]. W. Bogaerts, and et al., Layout-Aware Variability Analysis, Yield Prediction, and Optimization in Photonic Integrated Circuits, IEEE Journal of Selected Topics in Quantum Electronics 25, 5 (2019)
[2]. J. Jhoja , and et al., Efficient layout-aware statistical analysis for photonic integrated circuits, Optics Express 28, 6, pp. 7799-7816 (2020)
[3]. Q. Han , and et al., Phase errors and statistical analysis of silicon-nitride arrayed waveguide gratings, Optics Express 30, 24, pp. 42784-42800 (2022)